In order to have a larger viewing area, the technology about reducing the frame width of a flat panel display is getting more and more popular with the rapid development of flat panel display technology. Please refer to FIG. 1, which is a circuit view of a part of a conventional flat panel display adopting the tracking gate line in pixel technology. As shown, by employing the circuit technology as illustrated in FIG. 1, neither the fan out connection circuit nor the shift registers are required to be disposed on two sides of a panel; and consequentially, the panel can reduce frame width on its both sides.
However, as shown in FIG. 1, in order to control the pixel circuits P1, P2 and P3, the respective voltage levels of the gate lines G1, G2 and G3 must be controlled independently. Therefore, the tracking gate line TG1 is introduced, which is electrically coupled to the gate line G1 and configured to control the voltage level of the corresponding gate line G1; the tracking gate line TG2 is introduced, which is electrically coupled to the gate line G2 and configured to control the voltage level of the corresponding gate line G2; and the tracking gate line TG3 is introduced, which is electrically coupled to the gate line G3 and configured to control the voltage level of the corresponding gate line G3. Specifically, to charge the pixel circuits P1, firstly the related three pixel circuits P1, P2 and P3 must be turned on at the same time. Accordingly, the gate lines G1, G2 and G3, configured to control the turn on or turn off of the pixel circuits P1, P2 and P3, must have high voltage levels, respectively, based on that all the switch transistors of the pixel circuits P1, P2 and P3 are implemented with N-type transistors. In the next phase, the gate line G3 is pulled down to have a low voltage level first and the other two gate lines G2 and G3 are maintained to have high voltage levels. This process may cause a feed-through effect between the gate line G3 and the pixel circuit P3 and this feed-through effect is shared by the three pixel circuits P1, P2 and P3. In other words, the data voltage change caused by this feed-through effect on the pixel circuit P1 is about ⅓ of the data voltage change caused by a feed-through effect on one single pixel circuit.
Then, in the next phase, the gate line G3 is maintained to have a low voltage level; the gate line G1 is maintained to have a high voltage level; and the gate line G2 is pulled down to have a low voltage level. This process may cause a feed-through effect between the gate line G2 and the pixel circuit P2 and this feed-through effect is shared by the two pixel circuits P1 and P2. In other words, the data voltage change caused by this feed-through effect on the pixel circuit P1 is about ½ of the data voltage change caused by a feed-through effect on one single pixel circuit. Then, in the last phase, the gate line G1 is also pulled down to have a low voltage level thereby latching the data in the pixel circuit P1. This process may cause a feed-through effect between the gate line G1 and the pixel circuit P1 and this feed-through effect is shared by the pixel circuit P1 only. In other words, the data voltage change caused by this feed-through effect on the pixel circuit P1 is equal to the data voltage change caused by a feed-through effect on one single pixel circuit.
According to the above description, it is to be noted that the pixel circuit P1 totally has three feed-through effects which are serious enough to affect the data stored therein; the pixel circuit P4 totally has two feed-through effects which are serious enough to affect the data stored therein; and the pixel circuit P5 totally has one feed-through effect which are serious enough to affect the data stored therein.
Generally, the pixel circuits P5, P4 and P1 are used to display the primary red, green, and blue color in one pixel, respectively. Thus, in order to correctly display the desired original color, the aforementioned feed-through effect on the data voltage level must be compensated properly. However, it is quite complicate to compensate the voltage level of the stored data due to the three pixel circuits P5, P4 and P1 have different degrees of feed-through effect.